Capacitive probe for in situ measurement of wafer DC bias voltage
US6356097B1 · kind B1 · utility
15Cited by
9References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 27, 1999 |
| Grant date | Mar 12, 2002 |
| Priority date | — |
| Expiry date | Jul 27, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/26
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method and apparatus for estimating voltage on a wafer located in a process chamber. A probe, embedded in a wall of the process chamber, detects voltage levels generated by a plasma within the process chamber. A relationship between the detected plasma voltage level and the wafer voltage is determined.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.