Write circuit for large MRAM arrays
US6363000B1 · kind B1 · utility
93Cited by
5References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 5, 2001 |
| Grant date | Mar 26, 2002 |
| Priority date | — |
| Expiry date | Jun 25, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/15
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A write circuit for a large array of memory cells of a Magnetic Random Access Memory (“MRAM”) device. The write circuit can provide a controllable, bi-directional write current to selected word and bit lines without exceeding breakdown limits of the memory cells. Additionally, the write circuit can spread out the write currents over time to reduce peak currents.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.