Semiconductor structure and manufacturing method

US6365328B1 · kind B1 · utility

Assignees

• Infineon Technologies North America Corp. · US
• International Business Machines Corporation · US

Inventors

• Hua Shen · Beacon, US
• David E. Kotecki · Hopewell Junction, US
• Satish D. Athavale · Fishkill, US
• Jenny Lian · Oshima, JP
• Laertis Economikos · Hopewell Junction, US
• Fen F. Jamin · Wappingers Falls, US
• Gerhard Kunkel · Radebeul, DE
• Nirmal Chaudhary · Austin, US

Key dates

• Filing date: Mar 10, 2000
• Grant date: Apr 2, 2002
• Expiry date: Mar 10, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D1/682
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for forming an electrode. The method includes forming a conductive plug through a first dielectric layer. The plug extends from an upper surface of the first dielectric layer to a contact region in a semiconductor substrate. The electrode is formed photolithographically, misalignment of a mask registration in the photolithography resulting in exposing surface portions of the barrier contact. A second dielectric layer is deposited over the first dielectric layer, over side portions and top portions of the formed electrode, and over the exposed portions of barrier contact. A sacrificial material is provided on portions of the second dielectric layer disposed on lower sides of the, electrode, on portions of the second dielectric layer disposed on the first dielectric layer, and on said exposed portions of the barrier contact while exposing portions of the second dielectric layer on the top portions and upper side portions of the formed electrode. The exposed portions of the second dielectric layer are removed while leaving the portions of the second dielectric layer on the exposed portions of the barrier contact. A material is deposited over exposed portions of the first elec…