Switch mode power supply with reduced switching losses
US6388287B2 · kind B2 · utility
76Cited by
6References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2001 |
| Grant date | May 14, 2002 |
| Priority date | — |
| Expiry date | Mar 12, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/393
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention relates to a switching transistor presenting reduced switching losses. In the switching transistor, output capacitance is very high when drain/source voltages are low. As the drain/source voltage increases, the capacitance falls to such low values that the energy stored in the transistor becomes very low.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.