Method of etch bias proximity correction
US6395438B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 8, 2001 |
| Grant date | May 28, 2002 |
| Priority date | — |
| Expiry date | Jan 8, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70433
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method for including etch bias corrections in pre-processing of integrated circuit design data to compensate for deviations introduced during lithographic printing and etching. The design data is segmented, and etch bias corrections are applied to the segments based on their proximity to adjacent design features. Adjusted or corrected design data is produced which may be used to create a mask which includes etch bias corrections for better fidelity and reproduction of the original design in the etching step. Etch bias corrections may also be applied based upon characteristics of regions defined in the design, or on a pattern density of the design.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.