T or T/Y gate formation using trim etch processing
US6403456B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2000 |
| Grant date | Jun 11, 2002 |
| Priority date | — |
| Expiry date | Oct 5, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76802
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a T-gate structure is provided. The method comprises the steps of providing a silicon layer having a gate oxide layer, a protection layer over the gate oxide layer, a first sacrificial layer over the protection layer and a second sacrificial layer over the first sacrificial layer. A photoresist layer is formed over the second sacrificial layer. An opening is formed in the photoresist layer. An opening is then formed in the second sacrificial layer beneath the opening in the photoresist layer. The opening is then expanded in the photoresist layer to expose portions of the top surface of the second sacrificial layer around the opening in the second sacrificial layer. The opening is extended in the second sacrificial layer through the first sacrificial layer and the opening is expanded in the second sacrificial layer to form a T-shaped opening in the first and second sacrificial layers. The photoresist layer is removed and the T-shaped opening is filled with a conductive material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.