Method and apparatus for reducing particle contamination on wafer backside during CVD process
US6413321B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2000 |
| Grant date | Jul 2, 2002 |
| Priority date | — |
| Expiry date | Dec 7, 2020 |
Classification
- Technology area (CPC C)Chemistry; Metallurgy
- CPC primaryC23C16/4583
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Backside particle contamination of semiconductor wafers subjected to chemical vapor deposition is significantly reduced by optimizing various process parameters, alone or in combination. A high quality oxide seasoning layer is deposited to improve adhesion and trapping of contaminants remaining after a prior chamber cleaning step. Second, wafer pre-heating reduces thermal stress on the wafer during physical contact between the wafer and heater. Third, the duration of the gas stabilization flow of thermally reactive process gas species prior to CVD reaction is reduced, thereby preventing side products produced during this stabilization flow from affecting the wafer backside. Fourth, the wafer heater is redesigned to minimize physical contact between the heater surface and the wafer backside. Redesign of the wafer heater may include providing only a few, small projections from the top wafer surface, and also may include providing a continuous circumferential rim supporting the edge of the wafer to interfere with the flow of process gases to the wafer backside during processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.