Method of forming multilevel interconnect structure containing air gaps including utilizing both sacrificial and placeholder material

US6413852B1 · kind B1 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Alfred Grill · White Plains, US
• Jeffrey Hedrick · Peekskill, US
• Christopher V. Jahnes · Upper Saddle River, US
• Satyanarayana V. Nitta · Poughquag, US
• Kevin S. Petrarca · Newburgh, US
• Sampath Purushothaman · Yorktown Heights, US
• Katherine L. Saenger · Ossining, US
• Stanley Joseph Whitehair · Peekskill, US

Key dates

• Filing date: Aug 31, 2000
• Grant date: Jul 2, 2002
• Expiry date: Aug 31, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76885
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for forming a multilayer interconnect structure on a substrate that include interconnected conductive wiring and vias spaced apart by a combination of solid or gaseous dielectrics. The inventive method includes the steps of: (a) forming a first planar via plus line level pair embedded in a dielectric matrix formed from one or more solid dielectrics and comprising a via level dielectric and a line level dielectric on a substrate, wherein, at least one of said solid dielectrics is at least partially sacrificial; (b) etching back sacrificial portions of said at least partially sacrificial dielectrics are removed to leave cavities extending into and through said via level, while leaving, at least some of the original via level dielectric as a permanent dielectric under said lines; (c) partially filling or overfilling said cavities with a place-holder material which may or may not be sacrificial; (d) planarizing the structure by removing overfill of said place-holder material; (e) repeating, as necessary, steps (a)-(d); (f) forming a dielectric bridge layer over the planar structure; and (g) forming air gaps by at least partially extracting said place-holder material.