Method and apparatus for in-situ testing of integrated circuit chips
US6414509B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 3, 2000 |
| Grant date | Jul 2, 2002 |
| Priority date | — |
| Expiry date | May 3, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of testing semiconductor chips is disclosed. The individual semiconductor chips have I/O, power, and ground contacts. In the method of the invention a chip carrier is provided. The chip carrier has contacts corresponding to the contacts on the semiconductor chip. The carrier contacts have dendritic surfaces. The chip contacts are brought into conductive contact with the conductor pads on the chip carrier. Test signal input vectors are applied to the inputs of the semiconductor chip, and output signal vectors are recovered from the semiconductor chip. After testing, the chip may be removed from the substrate. Alternatively, the chip may be bonded through the dendritic conductor pads to the substrate after successful testing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.