T-gate formation using a modified conventional poly process
US6417084B1 · kind B1 · utility
25Cited by
11References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2000 |
| Grant date | Jul 9, 2002 |
| Priority date | — |
| Expiry date | Oct 12, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32139
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is provided for fabricating a T-gate structure. A structure is provided that has a silicon layer having a gate oxide layer, a polysilicon layer over the gate oxide layer, and an ARC layer over the polysilicon layer. A gate structure is formed by removing the ARC layer and a portion of the polysilicon layer around a gate region. Spacers are then formed around the gate structure. Undercut regions are formed in the gate structure by performing an isotropic etch to provide the gate structure with a base region and a contact region. The base region has a width smaller than the contact region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.