Flash memory with ultra thin vertical body transistors
US6424001B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2001 |
| Grant date | Jul 23, 2002 |
| Priority date | — |
| Expiry date | Feb 9, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Structures and method for Flash memory with ultra thin vertical body transistors are provided. The Flash memory includes an array of memory cells including floating gate transistors. Each floating gate transistor includes a pillar extending outwardly from a semiconductor substrate. The pillar includes a single crystalline first contact layer and a second contact layer vertically separated by an oxide layer. A single crystalline vertical transistor is formed along side of the pillar. The single crystalline vertical transistor includes an ultra thin single crystalline vertical body region which separates an ultra thin single crystalline vertical first source/drain region and an ultra thin single crystalline vertical second source/drain region. A floating gate opposes the ultra thin single crystalline vertical body region, and a control gate separated from the floating gate by an insulator layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.