Method of analyzing the effects of shadowing of angled halo implants
US6426262B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2000 |
| Grant date | Jul 30, 2002 |
| Priority date | — |
| Expiry date | Oct 28, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/26586
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention is directed to a method that comprises forming a plurality of transistors, each transistor having at least a gate electrode, and forming halo implant regions in the transistors while varying at least one of a halo implant angle, a masking layer height, and a lateral offset of a masking layer from the gate electrode of the transistors. The method further comprises determining electrical performance characteristics of at least some of the transistors where at least one of the halo implant angle, the masking layer height, and the lateral offset of a masking layer are different, and comparing the determined electrical performance characteristics of the transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.