Method of fabricating semiconductor-on-insulator (SOI) device with hyperabrupt source/drain junctions
US6429054B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 11, 2001 |
| Grant date | Aug 6, 2002 |
| Priority date | — |
| Expiry date | Jun 11, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0212
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor-on-insulator (SOI) device. The method includes providing an SOI wafer having an active layer, a substrate and a buried insulator layer therebetween; defining an active region in the active layer; forming a source, a drain and body in the active region, the source and the drain forming respective hyperabrupt junctions with the body, the hyperabrupt junctions being formed by an SPE process which includes amorphizing the at least one of the source and the drain, implanting dopant ion species and recrystalizing at temperature of less than 700° C.; forming a gate disposed on the body such that the source, drain, body and gate are operatively arranged to form a transistor; and forming a silicide region in each of the source and the drain, the silicide regions being spaced from the respective hyperabrupt junctions by a lateral distance of less than about 100 å.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.