Methods and arrangements for forming a single interpoly dielectric layer in a semiconductor device
US6433383B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 1999 |
| Grant date | Aug 13, 2002 |
| Priority date | — |
| Expiry date | Jul 20, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/685
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A single interpoly dielectric layer is provided for use in semiconductor devices. The single interpoly dielectric layer being formed of silicon graded such that certain regions within the single interpoly dielectric layer are either oxygen-rich or nitrogen-rich. The single interpoly dielectric layer can be formed in-situ within a single deposition tool. In certain embodiments, the resulting single interpoly dielectric layer can be made thinner and/or can be formed to provide improved dielectric characteristics when compared to a conventional oxide-nitride-oxide (ONO) interpoly dielectric layer that has three separate and unique layers. Thus, the single interpoly dielectric layer is highly desirable for use in reduced-size semiconductor devices and/or semiconductor devices requiring improved data retention capabilities, such as non-volatile memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.