Method of making a multi-thickness silicide SOI device
US6441433B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2001 |
| Grant date | Aug 27, 2002 |
| Priority date | — |
| Expiry date | Apr 2, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A transistor device formed on a semiconductor-on-insulator (SOI) substrate with a buried oxide (BOX) layer disposed thereon and an active layer disposed on the BOX layer having active regions defined by isolation trenches. The device includes a gate defining a channel interposed between a source and a drain formed within the active region of the SOI substrate. Further, the device includes a multi-thickness silicide layer formed on the main source and drain regions and source and drain extension regions wherein a portion of the multi-thickness silicide layer which is formed on the source and drain extension regions is thinner than a portion of the silicide layer which is formed on the main source and drain regions. The device further includes a second thin silicide layer formed on a polysilicon electrode of the gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.