Semiconductor module package substrate
US6445075B1 · kind B1 · utility
8Cited by
9References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 26, 2001 |
| Grant date | Sep 3, 2002 |
| Priority date | — |
| Expiry date | Jan 26, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A substrate includes a flip chip bond pad and a first bond pad on a dielectric substrate layer. First and second organic solderability protectant (OSP) layers are on the flip chip bond and first bond pad, respectively. A solder paste is on the first OSP layer. The solder paste is reflowed in an inert atmosphere to form a solder-on-pad (SOP) directly on and in contact with the flip chip bond pad. A sufficient thickness of the second OSP layer remains after reflow to inhibit oxidation of the first bond pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.