Patent · US Expired

Method and apparatus for controlling power management state transitions between devices connected via a clock forwarded interface

US6446215B1 · kind B1 · utility

18Cited by
5References
34Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 20, 1999
Grant dateSep 3, 2002
Priority date
Expiry dateAug 20, 2019

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D30/50
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method and apparatus for controlling power management state transitions between two devices, e.g., a processor and a bus bridge, that are connected through a clock forwarded interface bus in a computer system. The bus bridge is configured to coordinate disconnection of the processor from the interface. Particularly, the bus bridge may use a fist signal to indicate whether or not the processor is to be disconnected from the interface (e.g. a CONNECT signal) and the processor may use a second signal to indicate whether or not the processor is to be disconnected from the interface (e.g. a PROCREADY signal). The processor is disconnected from the interface responsive to both the first signal and the second signal indicating that the processor is to be disconnected. The signals may also be used to reconnect the processor to the interface.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.