Philip E. Madrid
25Patents
11h-index
28Co-inventors
75Inventor score
Filing activity: Mar 25, 1996 → Oct 26, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7263457B2 | System and method for operating components of an integrated circuit at independent frequencies and/or voltages | Emerging Cross-Sectional Technologies | 83 | Expired |
| US7328371B1 | Core redundancy in a chip multiprocessor for highly reliable systems | Physics | 47 | Expired |
| US7383423B1 | Shared resources in a chip multiprocessor | Physics | 36 | Expired |
| US7271634B1 | Delay-locked loop having a plurality of lock modes | Electricity | 30 | Expired |
| US6393502B1 | System and method for initiating a serial data transfer between two clock domains | Physics | 30 | Expired |
| US7877558B2 | Memory controller prioritization scheme | Physics | 27 | Active |
| US6668292B2 | System and method for initiating a serial data transfer between two clock domains | Physics | 27 | Expired |
| US6446215B1 | Method and apparatus for controlling power management state transitions between devices connected via a clock forwarded interface | Emerging Cross-Sectional Technologies | 18 | Expired |
| US6976122B1 | Dynamic idle counter threshold value for use in memory paging policy | Physics | 13 | Expired |
| US5732381A | Method and system for generating a fuel pulse waveform | Emerging Cross-Sectional Technologies | 12 | Expired |
| US6988217B1 | Method and mechanism for generating a clock signal with a relatively linear increase or decrease in clock frequency | Physics | 11 | Expired |
| US7761656B2 | Detection of speculative precharge | Physics | 9 | Active |
| US6584575B1 | System and method for initializing source-synchronous data transfers using ratio bits | Physics | 7 | Expired |
| US9122648B2 | Temperature throttling mechanism for DDR3 memory | Physics | 5 | Active |
| US8006032B2 | Optimal solution to control data channels | Physics | 3 | Active |
| US8607104B2 | Memory diagnostics system and method with hardware-based read/write patterns | Physics | 3 | Active |
| US6505261B1 | System and method for initiating an operating frequency using dual-use signal lines | Physics | 3 | Expired |
| US7840780B2 | Shared resources in a chip multiprocessor | Physics | 2 | Active |
| US7996653B2 | Shared resources in a chip multiprocessor | Physics | 2 | Active |
| US7636803B2 | Device and method for transferring data between devices | Physics | 2 | Active |
| US8195849B2 | Device and method for transferring data between devices | Physics | 1 | Active |
| US8594966B2 | Data processing interface device | Electricity | 1 | Active |
| US11379157B2 | Dynamic random access memory (DRAM) bandwidth increase without per pin bandwidth increase | Emerging Cross-Sectional Technologies | 0 | Active |
| US6760855B1 | System and method for reducing a ground bounce during write by selectively delaying address and data lines with different multiple predetermined amount of delay | Electricity | 0 | Expired |
| US7607061B2 | Shrink test mode to identify Nth order speed paths | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.