Patent · US Expired

Semiconductor memory configuration with a refresh logic circuit, and method of refreshing a memory content of the semiconductor memory configuration

US6452852B2 · kind B2 · utility

14Cited by

8References

7Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Thomas Böhm · Zorneding, DE
Georg Braun · Hersbruck, DE
Heinz Honigschmid · Starnberg, DE
Thomas Rohr · Aschheim, DE

Key dates

Filing date	Jan 22, 2001
Grant date	Sep 17, 2002
Priority date	—
Expiry date	Jan 22, 2021

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/406
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In a semiconductor memory configuration, a refresh operation is always started by a refresh logic circuit when a comparison circuit determines that there is a specific minimum difference when comparing a characteristic variable of at least one reference memory cell with a reference value (VREF).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.