Protection circuit for a memory array
US6455896B1 · kind B1 · utility
17Cited by
9References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2001 |
| Grant date | Sep 24, 2002 |
| Priority date | — |
| Expiry date | Apr 25, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/611
Abstract
The present invention provides a protection circuit comprising one diode wherein the diode is formed by diffusing a heavily doped material of a first conductivity type into a first region of a second conductivity type. An integrated circuit, such as a memory array, is coupled to the diode. The other diode back-to-back is coupled to the diode wherein the other diode is formed by diffusing a heavily doped material of the second conductivity type into the first region and a second region of the first conductivity type. The two diodes in series are capable of discharging for the memory array during manufacturing process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.