Cheng-Jye Liu
19Patents
4h-index
27Co-inventors
60Inventor score
Filing activity: Apr 25, 2001 → Jun 23, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6757193B2 | Coding method of multi-level memory cell | Physics | 81 | Expired |
| US6580135B2 | Silicon nitride read only memory structure and method of programming and erasure | Electricity | 75 | Expired |
| US6455896B1 | Protection circuit for a memory array | Electricity | 17 | Expired |
| US6608778B1 | Method for operating a NROM device | Physics | 7 | Expired |
| US8467245B2 | Non-volatile memory device with program current clamp and related method | Physics | 4 | Active |
| US7183608B2 | Memory array including isolation between memory cell and dummy cell portions | Electricity | 3 | Expired |
| US6608499B2 | Method for compensating a threshold voltage of a neighbor bit | Physics | 2 | Expired |
| US7403430B2 | Erase operation for use in non-volatile memory | Physics | 2 | Active |
| US8188536B2 | Memory device and manufacturing method and operating method thereof | Electricity | 2 | Active |
| US7937072B2 | Mobile phone accessing system and related storage device | Electricity | 2 | Active |
| US8837219B2 | Method of programming nonvolatile memory | Physics | 1 | Active |
| US8369154B2 | Channel hot electron injection programming method and related device | Physics | 1 | Active |
| US7881121B2 | Decoding method in an NROM flash memory array | Physics | 1 | Active |
| US8045390B2 | Memory system with dynamic reference cell and method of operating the same | Physics | 1 | Active |
| US7952934B2 | Method for programming a memory structure | Physics | 0 | Active |
| US7855918B2 | Method for programming a memory structure | Physics | 0 | Active |
| US7242617B2 | Method of dynamically adjusting operation of a memory chip and apparatus of measuring thickness of an ONO layer of the memory chip | Physics | 0 | Expired |
| US7026216B2 | Method for fabricating nitride read-only memory | Electricity | 0 | Expired |
| US11527272B2 | Pseudo-analog memory computing circuit | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.