Method of programming a non-volatile memory cell using a substrate bias
US6456536B1 · kind B1 · utility
43Cited by
7References
11Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 19, 2001 |
| Grant date | Sep 24, 2002 |
| Priority date | — |
| Expiry date | Jun 19, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of programming a memory cell with a substrate that includes a first region and a second region with a channel therebetween and a gate above the channel, and a charge trapping region that contains a first amount of charge. The method includes applying a constant first voltage across the gate, applying a second constant voltage across the first region and applying a third voltage that is constant and negative to the substrate so that the effect of spillover electrons is substantially reduced when compared with when the third constant voltage is absent.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.