Patent · US Expired

Method for fabricating an integrated circuit, in particular an antifuse

US6458631B1 · kind B1 · utility

9Cited by
6References
6Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 19, 2002
Grant dateOct 1, 2002
Priority date
Expiry dateFeb 19, 2022

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The present invention provides a method for fabricating an integrated circuit, comprising the following steps: preparing a circuit substrate (1); providing a metallization region (10a) comprising a first metal in the circuit substrate (1); providing a first insulation layer (25) above the metallization region (10a); forming an opening (13) in the insulating layer (25) in order to uncover at least part of the surface of the metallization region (10a); depositing a functional layer (15′) above the resulting structure; depositing a second insulating layer (35) above the resulting structure, in such a manner that the opening (13) is filled; polishing-back of the second insulating layer (35) and of the functional layer (15′) in order to uncover the surface of the first insulating layer (25); forming a contact (11a′) in the second insulating layer (35) inside the opening (13) in order to make contact with the functional layer (15′); and providing an interconnect (40a) for electrical connection of the contact (11a′).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.