Method for forming via-first dual damascene interconnect structure
US6458705B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2001 |
| Grant date | Oct 1, 2002 |
| Priority date | — |
| Expiry date | Jun 6, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76808
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In accordance with the present invention, a method for forming a via-first dual damascene interconnect structure by using gap-filling material whose thickness is easily controlled by a developer is provided. The essential part of the present invention is the application of gap-filling materials such as novolak, PHS, acrylate, methacrylate, and COMA to fill vias. Filling vias with these materials can get a greater planar topography for trench patterning due to its excellent gap-filling capacity, protect the bottom of vias from damage during the trench etch, and prevent the fence problem by using a developer to control its thickness in vias.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.