Chip-scale semiconductor package of the fan-out type and method of manufacturing such packages
US6462274B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 20, 1999 |
| Grant date | Oct 8, 2002 |
| Priority date | — |
| Expiry date | Oct 20, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Chip-scale semiconductor packages of the fan-out type and methods of manufacturing such packages are disclosed. In one package embodiment within the invention, the package substrate is stiff enough to effectively carry an increased number of solder balls on an exterior area outside the edge of a semiconductor chip, in addition to the area above the chip. In another package embodiment, a molded support is mounted to the lower surface of the exterior area. The methods of the present invention include making a plurality of packages on a substrate. Prior to sawing a wafer to obtain chips for the assembly method, the wafer is inspected so as to discriminate between good chips and the defective chips. Only good chips are mounted to a wafer-shaped or strip-shaped substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.