Semiconductor wafer and production method therefor
US6491836B1 · kind B1 · utility
25Cited by
3References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 26, 2000 |
| Grant date | Dec 10, 2002 |
| Priority date | — |
| Expiry date | Jun 26, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02024
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for producing a semiconductor wafer that yields a wafer having high flatness and back surface characteristics to address problems concerning the back surface of a wafer produced by the conventional surface grinding/double side polishing method and observed during the production process. The method comprises flattening both sides of the wafer by surface grinding means, eliminating a mechanically damaged layer by an etching treatment, and then subjecting a front surface of the wafer to a single side polishing treatment, wherein a back surface of the wafer has glossiness in a range of 20-80%.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.