Process for increasing a line width window in a semiconductor process
US6492097B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2000 |
| Grant date | Dec 10, 2002 |
| Priority date | — |
| Expiry date | Nov 3, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70441
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A process for increasing the line width window in a semiconductor process, which is suitable to be used to increase the line width widow at the time of the exposure of an iso-line pattern under 0.13 &mgr;m. This process includes: first forming a positive photoresist layer on the base, then using the first photomask to conduct the first exposure step on the positive photoresist layer. The first photomask is designed to have at least one main line that is opaque. On each of the two sides of the main line, there is a scattering bar. The width of the two scattering bars is greater than ⅓ of the wavelength of the light source that is used, and less than the width of the main line. The second photomask is used to conduct the second exposure step on the positive photoresist layer. The second photomask is designed to have at least two iso-lines that are pervious to light, and each of the two iso-lines is located at one of the two positions corresponding to the two scattering bars of the first photomask design. The width of each iso-line is greater than that of the corresponding scattering bar and the distance from each edge of the iso-line to each edge of the corresponding scatterin…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.