Patent · US Expired

Critical dimension control improvement method for step and scan photolithography

US6493063B1 · kind B1 · utility

8Cited by
5References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 24, 1999
Grant dateDec 10, 2002
Priority date
Expiry dateJun 24, 2019

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG03F7/70625
  • WIPO fieldOptics
  • WIPO sectorInstruments

Abstract

The invention provides a method and apparatus for reducing the variance of critical dimensions in a semiconductor device, by providing a method and apparatus for measuring lens and reticle error and then providing a method and apparatus for compensating for the error. The critical dimension of a die is measured and used to create a critical dimension function CD(x,y), where y is the direction of scan and x is perpendicular to the direction of scan, for a stepper scanner. CD(x,y) is used to determine the energy distribution E(x,y). E(x,y) is separated into orthogonal functions E(x) and E(y). Changes in the exposure energy or Gray filters or other means are used to compensate for the changes in E(x) and E(y).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.