Method of fabricating a high power RF field effect transistor with reduced hot electron injection and resulting structure
US6506648B1 · kind B1 · utility
8Cited by
8References
18Claims
0Family size
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Key dates
| Filing date | Sep 2, 1998 |
| Grant date | Jan 14, 2003 |
| Priority date | — |
| Expiry date | Sep 2, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of fabricating a high power RF lateral diffused MOS transistor (LDMOS) having increased reliability includes fabricating an N-drift region for the drain prior to fabrication of the gate contact and other process steps in fabricating the transistor. The resulting device has reduced adverse affects from hot carrier injection including reduced threshold voltage shift over time and reduced maximum current reduction over time. Linearity of device is maximized along with increased reliability while channel length is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.