Interface for a memory unit

US6507899B1 · kind B1 · utility

Assignee

• Infineon Technologies North America Corp. · US

Inventors

• Klaus Oberlaender · San Jose, US
• Sabeen Randhawa · Mountain View, US
• Yannick Martelloni · Poing, DE
• Manfred Henftling · Fürstenfeldbruck, DE
• Rami Zemach · Giv'at Shapira, IL
• Zohar Peleg · Ramat Gan, IL
• Christian Wiedholz · Munich, DE
• Gigy Baror · Austin, US
• Doron Shoham · Shoham, IL
• Oded Trainin · Raanana, IL
• Niv Margalit · Ramat HaSharon, IL

Key dates

• Filing date: Dec 13, 1999
• Grant date: Jan 14, 2003
• Expiry date: Dec 13, 2019

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F12/0215
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

An interface circuit for coupling a data handling unit with a memory unit having control inputs, an address signal input, a data signal input, and a data signal output is described. The interface circuit comprises an address buffer having an input and an output, said input receiving an address signal from said data handling unit, a first multiplexer which couples said memory unit with either said output of said address buffer or with said address signal, a data buffer having an input and an output, said input receiving a data signal from said data handling unit and said output being coupled with said memory data input, a second multiplexer for selecting either said memory data signal output or said data buffer output, and a comparator for comparing said address signal with the signal from said address buffer output, generating a control signal which controls said second multiplexer.