Field emission display cathode assembly with gate buffer layer
US6509686B1 · kind B1 · utility
3Cited by
24References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 16, 1999 |
| Grant date | Jan 21, 2003 |
| Priority date | — |
| Expiry date | Sep 16, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2329/00
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Improved field emission display includes a buffer layer of copper, aluminum, silicon nitride or doped or undoped amorphous, poly, or microcrystalline silicon located between a chromium gate electrode and associated dielectric layer in a cathode assembly. The buffer layer substantially reduces or eliminates the occurrence of an adverse chemical reaction between the chromium gate electrode and dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.