Flash memory having pre-interpoly dielectric treatment layer and method of forming
US6512264B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 14, 2000 |
| Grant date | Jan 28, 2003 |
| Priority date | — |
| Expiry date | Jul 19, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
A flash memory structure and its fabrication process, whereby stacks, of a first poly-crystalline silicon material or an amorphous silicon material (polysilicon), are processed for formation of a pre-interpoly dielectric treatment layer over the first polysilicon material. The pre-interpoly dielectric treatment layer being a solid material formed by a chemical reaction formed for purposes of improving the reliability of an interpoly dielectric member and results in changing the capacitor coupling ratio of the flash memory element and allows the use of new power supply and programming voltages. The pre-interpoly dielectric treatment layer is formed by exposing the polysilicon stacks to a selected one of at least three ambient reagent gases. The selected gaseous ambient and exposure of the polysilicon stacks being performed in a fabrication tool such as a batch furnace, a single wafer rapid thermal anneal tool, or a plasma chamber. The reagent gases consist essentially of: (1) nitrous oxide (N2O) and/or nitric oxide (NO), (2) oxygen (O2) and/or water (H2O), and (3) ammonia (NH3). Any one ambient reagent gas may be selected and utilized in any of the foregoing fabrication tools for pr…
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