Robert B. Ogle
51Patents
17h-index
42Co-inventors
84Inventor score
Filing activity: Sep 5, 1996 → May 4, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6674138B1 | Use of high-k dielectric materials in modified ONO structure for semiconductor devices | Electricity | 256 | Expired |
| US5939763A | Ultrathin oxynitride structure and process for VLSI applications | Electricity | 190 | Expired |
| US6451641B1 | Non-reducing process for deposition of polysilicon gate electrode over high-K gate dielectric material | Electricity | 110 | Expired |
| US6803272B1 | Use of high-K dielectric material in modified ONO structure for semiconductor devices | Electricity | 108 | Expired |
| US6645882B1 | Preparation of composite high-K/standard-K dielectrics for semiconductor devices | Electricity | 82 | Expired |
| US6245689A | Process for reliable ultrathin oxynitride formation | Electricity | 74 | Expired |
| US6265268A | High temperature oxide deposition process for fabricating an ONO floating-gate electrode in a two bit EEPROM device | Electricity | 63 | Expired |
| US6319775A | Nitridation process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device | Electricity | 37 | Expired |
| US6867097B1 | Method of making a memory cell with polished insulator layer | Electricity | 29 | Expired |
| US6180538A | Process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device using rapid-thermal-chemical-vapor-deposition | Electricity | 28 | Expired |
| US5879975A | Heat treating nitrogen implanted gate electrode layer for improved gate electrode etch profile | Electricity | 26 | Expired |
| US6825115B1 | Post silicide laser thermal annealing to avoid dopant deactivation | Electricity | 23 | Expired |
| US6656749B1 | In-situ monitoring during laser thermal annealing | Electricity | 23 | Expired |
| US6780789B1 | Laser thermal oxidation to form ultra-thin gate oxide | Electricity | 19 | Expired |
| US6555439B1 | Partial recrystallization of source/drain region before laser thermal annealing | Electricity | 18 | Expired |
| US6512264B1 | Flash memory having pre-interpoly dielectric treatment layer and method of forming | Electricity | 18 | Expired |
| US6680250B1 | Formation of deep amorphous region to separate junction from end-of-range defects | Electricity | 18 | Expired |
| US6278166A | Use of nitric oxide surface anneal to provide reaction barrier for deposition of tantalum pentoxide | Electricity | 13 | Expired |
| US7001814B1 | Laser thermal annealing methods for flash memory devices | Electricity | 13 | Expired |
| US6812106B1 | Reduced dopant deactivation of source/drain extensions using laser thermal annealing | Electricity | 13 | Expired |
| US6355933B1 | Ion source and method for using same | Electricity | 11 | Expired |
| US6743689B1 | Method of fabrication SOI devices with accurately defined monocrystalline source/drain extensions | Electricity | 10 | Expired |
| US7602067B2 | Hetero-structure variable silicon rich nitride for multiple level memory flash memory device | Electricity | 9 | Active |
| US6867080B1 | Polysilicon tilting to prevent geometry effects during laser thermal annealing | Emerging Cross-Sectional Technologies | 8 | Expired |
| US6306777A | Flash memory having a treatment layer disposed between an interpoly dielectric structure and method of forming | Electricity | 8 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.