Patent · US Expired

Integrated semiconductor memory having memory cells with a ferroelectric memory property

US6515890B2 · kind B2 · utility

0Cited by

1References

5Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Robert Esterl
Helmut Kandolf · Hersbruck, DE
Heinz Honigschmid · Starnberg, DE
Thomas Rohr · Aschheim, DE

Key dates

Filing date	Feb 9, 2001
Grant date	Feb 4, 2003
Priority date	—
Expiry date	Jul 7, 2021

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/22
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An integrated semiconductor memory has memory cells with a ferroelectric memory property. The memory cells are in each case connected between a column line and a charge line. The column line is connected to a read amplifier which supplies an output signal. The charge line is connected to a driver circuit which provides the charge line with a given potential. In an inactive mode, the column line and the charge line are jointly connected to a connection for a common supply potential in the read amplifier or in the driver circuit. As a result, a relatively quick equalization of a potential between the lines is possible. Thus, unintended changes in the memory cell content due to interfering voltages are avoided.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.