Chip size image sensor bumped package
US6528857B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2000 |
| Grant date | Mar 4, 2003 |
| Priority date | — |
| Expiry date | Nov 13, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/12041
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An image sensor package includes an image sensor having an upper surface. The image sensor further includes an active area and bond pads on the upper surface. A window is supported above the active area by a window support. Interior traces are formed on a lower surface of a step up ring. Electrically conductive bumps are formed between the interior traces on the lower surface of the step up ring and the bond pads on the upper surface of the image sensor thus flip chip mounting the step up ring to the image sensor. Electrically conductive vias extend through the step up ring to electrically connect the interior traces to exterior traces formed on an upper surface of the step up ring.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.