Circuit selection of magnetic memory cells and related cell structures
US6538921B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 14, 2001 |
| Grant date | Mar 25, 2003 |
| Priority date | — |
| Expiry date | Aug 14, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A ferromagnetic thin-film based digital memory having a plurality of bit structures interconnected with manipulation circuitry having a plurality of transistors so that each bit structure has transistors electrically coupled thereto that selectively substantially prevents current in at least one direction along a current path through that bit structure and permits selecting a direction of current flow through the bit structure if current is permitted to be established therein. A bit structure has a nonmagnetic intermediate layer with two major surfaces on opposite sides thereof and a memory film of an anisotropic ferromagnetic material on each of the intermediate layer major surfaces with an electrically insulative intermediate layer is provided on the memory film on which a magnetization reference layer is provided having a fixed magnetization direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.