Field-effect transistor configuration with a trench-shaped gate electrode and an additional highly doped layer in the body region

US6541818B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Frank Pfirsch · Birkenfeld, DE
• Carsten Schäffer · Sattendorf, AT

Key dates

• Filing date: Jun 18, 2001
• Grant date: Apr 1, 2003
• Expiry date: Jun 18, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/519

Abstract

A field effect transistor configuration with a trench gate electrode and a method for producing the same. An additional highly doped layer is provided in the body region under the source. The layer is used for influencing the conductibility of the source or the threshold voltage in the channel region. Breakdown currents and latch-up effects can thereby be prevented.