ROM embedded DRAM with bias sensing
US6545899B1 · kind B1 · utility
32Cited by
22References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 12, 2001 |
| Grant date | Apr 8, 2003 |
| Priority date | — |
| Expiry date | Dec 12, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/104
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A ROM embedded DRAM that provides ROM cells that can be programmed to a single state. Bias techniques are used to read un-programmed ROM cells accurately. Sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. Further, a differential pre-charge operation can also be used in another embodiment. The ROM embedded DRAM allows for simplifier fabrication and programming of the ROM cells, while providing accurate dual state functionality.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.