Method of fabricating an integrated circuit configuration with at least one capacitor

US6548350B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Bernhard Sell · Dresden, DE
• Dirk Schumann · Lübbenau/Spreewald - Lubnjow/Błota, DE
• Josef Willer · Riemerling, DE

Key dates

• Filing date: Mar 7, 2002
• Grant date: Apr 15, 2003
• Expiry date: Mar 7, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/033

Abstract

The capacitor is arranged on the surface of a substrate. A first capacitor electrode has a middle part and a side part, which point vertically upwards, are arranged beside each other and are connected with each other via an upper part located above said middle part and said side part. The middle part is longer than the side part and is connected with other components of the circuit configuration located below said middle part and said side part. The first capacitor electrode is provided with a capacitor dielectric. A second capacitor electrode borders the capacitor dielectric.