Semiconductor wafer processing apparatus and method
US6549393B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 6, 2001 |
| Grant date | Apr 15, 2003 |
| Priority date | — |
| Expiry date | Sep 6, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/2001
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer stage 2 for holding a semiconductor wafer in a plasma treatment apparatus by setting the wafer on the wafer stage, said wafer stage 2 comprising a base material 26 equipped with refrigerant flow paths for allowing a refrigerant for temperature adjustment to flow; a stress-reducing member 28 provided on the wafer setting side of said base material 26 and having a smaller thermal expansion coefficient than does said base material; a dielectric film 30 provided on the wafer setting side of said stress-reducing member; and a deflection-preventing member 29 provided on the wafer non-setting side of said base material and having a smaller thermal expansion coefficient than does said base material. When the wafer stage is used, the temperature of the wafer as a substrate to be processed can be controlled uniformly and very accurately.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.