Dummy layer diode structures for ESD protection
US6552399B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 7, 2002 |
| Grant date | Apr 22, 2003 |
| Priority date | — |
| Expiry date | Feb 7, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
Abstract
Described are structures for a device with a controllable dummy layer which can provide a low controllable trigger voltage and can be used as a first triggered device in ESD protection networks. A controllable dummy layer diode is provided which is structured as a butting diode with a dummy polysilicon layer above the butting region. The dummy polysilicon layer functions as an STI block to remove the STI between the n+ and p+ regions of the diode. In one embodiment the diode has the function of a controllable gate with a punchthrough-like-trigger, in which a capacitor-couple circuit couples a portion of the ESD voltage into the gate of the diode to provide a gate voltage. By changing the channel length under the gate of the diode as well as the gate voltage, the reverse-biased voltage of the diode is readily adjusted to a predetermined
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.