Contact forming method for semiconductor device
US6555450B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 4, 2001 |
| Grant date | Apr 29, 2003 |
| Priority date | — |
| Expiry date | Oct 4, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/05
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A contact forming method of a semiconductor device is disclosed, in which a pad polysilicon layer is formed at an active region of a cell array, thereafter an upper portion of a gate is opened when a spacer of a NMOS transistor region is formed. And at the same time a gate capping insulating layer of the cell array region, the active region of the NMOS transistor and the gate node contact region remains at a predetermined thickness by etching the spacer. And then, by performing an ion implantation procedure on the entire surface, the direct pad polysilicon layer and the buried pad polysilicon layer are simultaneously ion-implanted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.