Memory device
US6567296B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 24, 2001 |
| Grant date | May 20, 2003 |
| Priority date | — |
| Expiry date | Oct 24, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/72
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device including a plurality of memory cells, a plurality of insulated first regions of a first type of conductivity formed in a chip of semiconductor material, at least one second region of a second type of conductivity formed in each first region, a junction between each second region and the corresponding first region defining a unidirectional conduction access element for selecting a corresponding memory cell connected to the second region when forward biased, and at least one contact for contacting each first region; a plurality of access elements are formed in each first region, the access elements being grouped into at least one sub-set consisting of a plurality of adjacent access elements without interposition of any contact, and the memory device further includes means for forward biasing the access elements of each sub-set simultaneously.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.