Sidewall NROM and method of manufacture thereof for non-volatile memory cells
US6583479B1 · kind B1 · utility
49Cited by
23References
12Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Oct 16, 2000 |
| Grant date | Jun 24, 2003 |
| Priority date | — |
| Expiry date | Oct 16, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An non-volatile read only memory transistor for use in a memory array is disclosed. The non-volatile read only memory transistor features a substantially vertically oriented channel fabricated in a trench formed in the substrate. The channel length is dependent upon the depth of the trench and therefore a dense array of NROM transistors can be formed without adversely affecting the channel length and therefore the operational performance of the transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.