Semiconductor package with stacked substrates and multiple semiconductor dice
US6583503B2 · kind B2 · utility
218Cited by
38References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 2, 2002 |
| Grant date | Jun 24, 2003 |
| Priority date | — |
| Expiry date | May 2, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49144
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package comprising multiple stacked substrates having flip chips attached to the substrates with chip-on-board assembly techniques to achieve dense packaging. The substrates are preferably stacked atop one another by electric connections which are column-like structures. The electric connections achieve electric communication between the stacked substrates, must be of sufficient height to give clearance for the components mounted on the substrates, and should preferably be sufficiently strong enough to give support between the stacked substrates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.