Cross-diffusion resistant dual-polycide semiconductor structure and method

US6583518B2 · kind B2 · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• Jigish Trivedi · Boise, US
• Zhongze Wang · San Diego, US
• Todd R. Abbott · Boise, US
• Chih-Chen Cho · Richardson, US

Key dates

• Filing date: Aug 31, 2001
• Grant date: Jun 24, 2003
• Expiry date: Aug 31, 2021

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S257/904

Abstract

A dual-polycide semiconductor structure and method for forming the same having reduced dopant cross-diffusion. A conductive layer is formed over a polysilicon layer having a first region doped with a first dopant and a second region adjoining the first region at an interface doped with a second dopant. A region of discontinuity is then formed in the conductive layer located away from the interface. The conductive layer formed over the polysilicon gate overlaps the interface to provide electrical continuity between the first and second regions of the polysilicon gate, but also includes a region of discontinuity to reduce dopant cross-diffusion.