Method of selectively forming local interconnects using design rules
US6594172B2 · kind B2 · utility
6Cited by
12References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2001 |
| Grant date | Jul 15, 2003 |
| Priority date | — |
| Expiry date | Nov 19, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/09
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention includes a method of fabricating a circuit in a manner to place certain structures within a predefined distance of one another. Electrical connections are formed between certain structures of silicon, by annealing a conductive material to cause silicon out-diffusing to form local interconnects. The silicon out-diffusion can be facilitated without a masking step thereby simplifying as well as speeding up the fabrication process. The invention also includes a local interconnect thus formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.