Run-to-run control over semiconductor processing tool based upon mirror image target
US6625513B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2000 |
| Grant date | Sep 23, 2003 |
| Priority date | — |
| Expiry date | Oct 23, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
Run-to-run variation of a semiconductor fabrication tool is minimized utilizing a mirror image target. A goal represents a process result desired from operation of the tool. The mirror image target is generated by adding the goal to a difference between an output from a previous tool run and the goal. Prediction of tool performance is based upon a data-based modeling engine utilizing a reference library correlating operational parameters with observed process results for prior tool runs. The mirror image target vector is compared to the reference library and serves as a basis for generating the recipe for the subsequent process run. This recipe automatically brings operation of the tool back toward the goal. The method may further include comparison of the suggested recipe with the recipe of the prior run to determine whether run-to-run variation is serious enough to warrant a change in tool conditions, or whether run-to-run variation is so serious as to indicate a major tool problem. Generation of the mirror image target, and utilization of the mirror image target to create a new process recipe, eliminates effort and uncertainty associated with conventional nonsystematic analysis …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.