Flash memory cell and method to achieve multiple bits per cell
US6628544B2 · kind B2 · utility
21Cited by
25References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 25, 2002 |
| Grant date | Sep 30, 2003 |
| Priority date | — |
| Expiry date | Jan 25, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/565
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of flash memory cell programming is provided which uses a uniform electric potential across tunnel oxide. The tight Vt distribution and very stable Vt shift over program/erase cycling allows for a multi-level cell capable of having more than 2 bits per cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.