Christoph Ludwig
43Patents
7h-index
77Co-inventors
72Inventor score
Filing activity: May 31, 2000 → Sep 10, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6734063B2 | Non-volatile memory cell and fabrication method | Electricity | 55 | Expired |
| USD566661S1 | Operating housing for a control panel | General | 35 | Expired |
| US7365382B2 | Semiconductor memory having charge trapping memory cells and fabrication method thereof | Electricity | 27 | Expired |
| US6580118B2 | Non-volatile semiconductor memory cell having a metal oxide dielectric, and method for fabricating the memory cell | Electricity | 21 | Expired |
| US6628544B2 | Flash memory cell and method to achieve multiple bits per cell | Physics | 21 | Expired |
| USD566660S1 | Operating housing for a control panel | General | 17 | Expired |
| US8595449B2 | Memory scheduler for managing maintenance operations in a resistive memory in response to a trigger condition | Physics | 7 | Active |
| US6654281B2 | Nonvolatile nor semiconductor memory device and method for programming the memory device | Electricity | 7 | Expired |
| US7274069B2 | Memory cell | Electricity | 6 | Expired |
| US6992348B2 | Semiconductor memory with vertical charge-trapping memory cells and fabrication | Electricity | 5 | Expired |
| US10293696B2 | Operation of an inductive power transfer system based on detecting an arrangement | Emerging Cross-Sectional Technologies | 5 | Active |
| US7405441B2 | Semiconductor memory | Electricity | 5 | Expired |
| US6909153B2 | Semiconductor structure having buried track conductors, and method for generating an electrical contact with buried track conductors | Electricity | 4 | Expired |
| US7184291B2 | Semiconductor memory having charge trapping memory cells and fabrication method | Electricity | 4 | Expired |
| US7678679B2 | Vertical device with sidewall spacer, methods of forming sidewall spacers and field effect transistors, and patterning method | Electricity | 4 | Active |
| US7005355B2 | Method for fabricating semiconductor memories with charge trapping memory cells | Electricity | 4 | Expired |
| USD442873S | Stand, especially for the mounting of a recording, detecting and controlling device | General | 3 | Expired |
| US11226348B2 | Storage module, method of operating a laboratory automation system and laboratory automation system | Physics | 3 | Active |
| US6368970B1 | Semiconductor configuration and corresponding production process | Electricity | 3 | Expired |
| US7411837B2 | Method for operating an electrical writable and erasable memory cell and a memory device for electrical memories | Physics | 2 | Active |
| US7408222B2 | Charge trapping device and method of producing the charge trapping device | Electricity | 2 | Expired |
| US7323388B2 | SONOS memory cells and arrays and method of forming the same | Electricity | 2 | Expired |
| US7122434B2 | Method for generating an electrical contact with buried track conductors | Electricity | 2 | Expired |
| US7678654B2 | Buried bitline with reduced resistance | Physics | 1 | Active |
| US6711065B2 | 1 T flash memory recovery scheme for over-erasure | Physics | 1 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.